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Ensemble Datasheets

Complete technical description of functions and characteristics for Ensemble microcontrollers and fusion processors.

E1 Series Datasheet

MCU with single core up to 160MHz operation, secure enclave, many standard peripherals plus optional NPU accelerator up to 46 GOPS performance, and optional graphics subsystem.

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E3 Series Datasheet

MCU with dual cores up to 160MHz and 400MHz operation, up to very large memory, secure enclave, many peripherals plus optional AI/ML NPUs accelerators up to 250 GOPS performance.

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E5 Series Datasheet

Fusion Processor with triple cores up to 160MHz, 400MHz, and 800MHz operation capable of running combinations of Linux and/or RTOS, large memory, secure enclave, many peripherals, and AI/ML NPUs accelerators up to 250 GOPS performance.

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E7 Series Datasheet

Fusion Processor with quad cores up to 160MHz, 400MHz, and 800MHz operation capable of running combinations of Linux and/or RTOS, large memory, secure enclave, many peripherals, and AI/ML NPUs accelerators up to 250 GOPS performance.

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E7 Series Revision A Errata

This errata describes the functional differences between the Revision A devices used on the Beta Ensemble DevKit and the Beta AI/ML AppKit compared to the E7 Series Datasheet (ADTS0005).

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Engineering Samples vs Production Silicon GPIOs v1.1

This document describes the GPIO pin mux options and output grouping for the production (Gen 2) silicon versus the beta (Gen 1) silicon.

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